High performance Carbon Nanotube (CNT) Field Effect Transistors (FETs) have been demonstrated in the art. See, for example, the following references, which are all incorporated herein by reference: I. Radu et al., “Oriented Growth of Single-Wall Carbon Nanotubes Using Alumina Patterns,” Nanotechnology, Vol. 15, pp. 473-476 (Feb. 2, 2004); S. Li et al., “Silicon Nitride Gate Dielectric for Top-Gated Carbon Nanotube Field Effect Transistors,” J. Vac. Sci. Technol. B, Vol. 22, No. 6, pp. 3112-3114 (Dec. 10, 2004); A. Yu, “A Study of Carbon Nanotubes and Their Applications in Transistors,” School of Electrical and Computer Engineering, 1-32 (May 17, 2004) (published at http://132.236.67.210/engrc350/ingenuity/Yu_A_paper_issue—3.pdf); “Carbon Nanotubes and Nanotube Transistors,” ECE497NC Lecture 14, 1-9 (Mar. 10, 2004) (published at http://www.crhc.uiuc.edu/ece497nc/scribe/nanotubel.pdf); A. Javey et al., “Carbon Nanotube Field-Effect Transistors with Integrated Ohmic Contacts and High-K Gate Dielectrics,” Nano Letters, Vol. 4, No. 3, pp. 447-450 (Feb. 20, 2004); S. Heinze et al., “Electrostatic Engineering of Nanotube Transistors for Improved Performance,” Applied Physics Letters, Vol. 83, No. 24, pp. 5038-5040 (Dec. 15, 2003); A. Javey et al., “Advancements in Complementary Carbon Nanotube Field-Effect Transistors,” IEDM Tech. Digest., pp. 741-74 (2003); J. Guo et al., “Performance Projections for Ballistic Carbon Nanotube Field-Effect Transistors,” Applied Physics Letters, Vol. 80, No. 17, pp. 3192-3194 (Apr. 29, 2002); X. Liu et al., “Carbon Nanotube Field-Effect Inverters,” Applied Physics Letters, Vol. 79, No. 20, pp. 3329-3331 (Nov. 12, 2001); R. Martel et al., “Single- and Multi-Wall Carbon Nanotube Field-Effect Transistors,” Applied Physics Letters, Vol. 73, No. 17, pp. 2447-2449 (Oct. 26, 1998).
As these prior approaches make clear, a CNT FET, like a traditional FET, comprises a gate, a source, and a drain. A carbon nanotube, or a plurality of carbon nanotubes, span(s) lengthwise between the source and the drain such that an end of each tube(s) is in contact with the drain and source. Accordingly, the carbon nanotube(s) comprise(s) the conductive media or “channel” for the CNT FET. It is generally believed that gating of the channel occurs by modulation of the barrier heights of the junctions between the carbon nanotubes and the metallic source/drain regions.
Some CNT FETs as published in the art are somewhat hypothetical or prophetic in nature. That is, some are discussed at a theoretical level without any or proper consideration of the processes that might be used to fabricate the CNT FET. Moreover, other CNT FETs as published use processes which are not manufacturable at high densities or which employ somewhat exotic processing techniques. The lack of an efficient, inexpensive, and dense CNT FET manufacturing process will hamper the growth and utility of CNT technology for leading-edge integrated circuit products.
Hence, it is a goal of the disclosure to provide a manufacturing process for forming CNT FETs that uses standard semiconductor processing techniques; that provides a dense structure commensurate with minimum linewidth lithography; and that is well adapted for use in logic and memory circuitry.